Please use this identifier to cite or link to this item:
https://elib.bsu.by/handle/123456789/51122
Title: | H.264/AVC Decoder Prototype Using a Platform Based SoC Design Methodology |
Authors: | Stankevich, A. Petrovsky, A. Kachinsky, M. Parfieniuk, M. Petrovsky, A. |
Keywords: | ЭБ БГУ::ОБЩЕСТВЕННЫЕ НАУКИ::Информатика |
Issue Date: | 2009 |
Publisher: | Минск: БГУ |
Abstract: | In this paper, a hardwired solution has been proposed for H.264/AVC decoder based on the evaluation board ML401. The design explored the possibility of achieving both programmability and real-time performance with affordable hardware acceleration. At the same time, features of H.264/AVC processing were analyzed for more suitable accelerator design. The H.264/AVC decoder includes a RISC 32-bits processor Plasma-NTLab and low-cost and reprogrammable accelerators perform computational intensive tasks with high parallelism. The structures of 32-bit RISC processor, syntax parser, NALU decoder, parameters parser and two dimensional DCT have shown in details. |
URI: | http://elib.bsu.by/handle/123456789/51122 |
Appears in Collections: | 2009. Труды 10-й Международной Конференции "Распознавание образов и обработка информации" |
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